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ASIC AI/ML Engineer, Annapurna Labs, MLA SOC, Methodology & Infrastructure

Amazon

Amazon

Software Engineering, Other Engineering, Data Science
Tel Aviv-Yafo, Israel
Posted on Jan 27, 2026

Description

Our Machine Learning Acceleration (MLA) team develops the SOCs that are used to power today’s AI workloads in datacenters all around the world. As a Frontend ASIC engineer, you’ll contribute to the project at the ground level by automating workflows and developing large-scale solutions that accelerate silicon development - it’s still Day One here at Amazon!

We are seeking an experienced ASIC AI/ML Engineer with deep expertise in AI/ML infrastructure and application development specifically for semiconductor design verification disciplines. The ideal candidate will have a proven track record of delivering end-to-end AI solutions from concept to large-scale production deployment.

In this role, you will collaborate directly with architects, designers, verification engineers, software teams, and backend specialists to define best practices and deploy production-ready AI-driven workflows and applications. Your focus will be on implementing LLM, GenAI, and classical ML solutions that transform our ASIC design verification processes and accelerate our path to tape-out.

Key job responsibilities
• Develop and maintain scalable AI/ML infrastructure for ASIC design and verification teams
• Architect, develop, and deploy production-ready AI/ML applications for semiconductor design workflows
• Design and implement GenAI solutions including LLMs and agentic AI systems for verification processes • Invent innovative AI-driven solutions to eliminate identified inefficiencies in design and verification flows
• Establish best practices and standards for AI/ML application development in semiconductor environments
• Create monitoring and observability frameworks for AI model performance in production design environments
• Collaborate cross-functionally with architects, designers, verification engineers, and software teams
• Research and evaluate emerging AI technologies for applicability to semiconductor design challenges