Description

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies.

We are seeking an experienced Emulation Engineer to build the next generation of our cloud server infrastructure using our emulation platform. In this role, you will define, develop and execute the methodologies to drive system validation flows that cover the ML chip design and verification requirements.

You will work closely with various teams to determine the emulation platform requirements, models needed for functional testing and automation of various workflows. You will be delivering a state-of-the-art testbench, integrate the ViP components into the SoC and ensure a high quality of the design delivered to the customers. You will be developing a strong understanding of the product and continuously raise the bar to ensuring that emulation models are functionally correct and performant.

Join us in creating the most advanced Machine Learning Accelerators in the world!

Key job responsibilities
Design emulation capabilities in system verilog/C/C++/Python/Shell scripts to facilitate system validation flows
Develop scalable compile flows targeting project requirements
Knowledge of end to end emulation compilation flows involving front end and back end synthesis
Familiar with using emulation tool chain from Zebu, Cadence or Veloce
Develop bus functional prototype models using DPI programming in system verilog/C/C++
Develop System Verilog modules required for integrating with standard xtors
Experience in run time architecture of any emulation framework.
Develop run time framework in C++ to execute compiled emulation models
Optimize build and run times of emulation models.
Automate system flow execution in emulation using bash/python/tcl etc.
Work with SoC teams to learn about system flows and execute them on emulation framework
Debug RTL failures associated with chip functionality
Proficient with using various emulation debug technologies
Knowledge of using gdb and other techniques to debug software failures
Work with vendors to ensure emulation tool chain is up to date with latest technologies

A day in the life
As a senior emulation engineer, you have an unique opportunity to define and develop emulation driven end-to-end system validation methodologies.
You would be working closely with our vendor, software, firmware, architecture, design and verification teams to design and execute system validation flows.