Description

Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of Silicon and Hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Physical Design Integration and Verification Engineer to join our backend team. The ideal candidate will be responsible for ensuring the quality and manufacturability of complex semiconductor designs through physical verification processes, and help us trail-blaze new technologies - Its still Day 1 here!

Key job responsibilities
- Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (Calibre, IC Validator)
- Drive chip level physical verification sign-off and closure
- Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification, and Fill insertion
- Debug and resolve physical verification issues in collaboration with layout and design teams
- Interface with foundries for rule deck updates and violation waivers
- Develop and maintain verification runsets and methodologies
- Support technology file development and qualification
- Fine tune cloud infrastructure to improve compute and storage utilization for physical design work.
- Mentor junior engineers on physical verification methodologies and closure

About the team
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.