Wireless SOC Design Verification Engineer
Apple
Design
Sunnyvale, CA, USA
Posted on Jun 19, 2025
As part of our team, you will have the opportunity to verifying complex SOCs. Our team integrates multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM Testbenches, implement effective coverage driven and directed test cases, deploy new tools, and implement methodologies to improve quality of tape-out readiness. By collaborating with other product development groups across Apple, you can push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a large-scale SOC, different types of SOC architectures, many high speed layered protocols, methodologies on low power architecture, best-in-class DV methodology. You will gain knowledge on Wireless protocols, FW-HW interactions, complexities of multi-chip SOC debug architecture. As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state of the art Wireless SOCs! This position comes with responsibility for pre-silicon RTL verification of block and top level SOC, comfortable with all areas of SOC Design Verification engineering, with an ability to thrive in a dynamic multi-functional organization, debate ideas openly, and deliver on complex Wireless protocol chip requirements.