Design Verification Engineer
Microsoft
Design Verification Engineer
Redmond, Washington, United States
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Overview
Microsoft Azure is building the fastest network in public cloud. We welcome candidates with experience across hardware, systems, and applications, who enjoy bringing ideas to life in production environments. Join us as a verification engineer to build the world's fastest public cloud and make a difference to millions of people across the planet.
We are looking for a design verification engineer to work in the Accelnet Hardware team. You will be part of the design verification team, driving several features, developing and enhancing verification environment framework for software defined networking (SDN) accelerators in Azure Boost.
You will develop the infrastructure for next-generation SDN accelerators which can do arbitrary packet manipulations, provide network security, enhance connection establishment performance, and improve performance with Remote Direct Memory Access (RDMA) and custom network protocols. This role involves collaborating with hardware and software teams to advance project goals. Join us in building a hyperscale global cloud where innovation is encouraged across all layers of the computing stack.
This is a unique opportunity for design verification engineers to see Register-Transfer Level (RTL) code go to production within weeks instead of years.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
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Qualifications
- Bachelor's Degree in Computer Science, or related technical discipline with proven experience coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.
- Experience in hardware design verification, verification methodologies, and system Verilog
- Master's Degree in Electrical Engineering, Computer Science, Information Technology, or related field AND 1+ years technical experience in network design, development, and automation.
- Doctorate Degree in Electrical Engineering, Computer Science, Computer Engineering, Information Technology, or related field.
- Understanding of constrained random verification principles and experience in writing comprehensive test plans.
- Deep understanding of system Verilog constraints, functional coverage, and assertions.
- Familiarity with formal verification.
- Demonstrates strong communication skills, collaborates effectively with diverse teams, takes initiative, and approaches challenges with thoughtful solutions.
- Experience in scripting languages such as Python and PowerShell.
Software Engineering IC2 - The typical base pay range for this role across the U.S. is USD $84,200 - $165,200 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $109,000 - $180,400 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay
Microsoft will accept applications for the role until October 29th, 2025.
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Responsibilities
- Build scalable constrained random verification environment in system Verilog using prevalent verification methodologies.
- Create comprehensive test plans to address functional scenarios in discussions with the software and hardware design teams.
- Execute the test plan by adding testcases and tracking verification through coverage driven metrices.
- Create and enhance verification environment by adding sequences, constraints, assertions, and functional coverage.
- Scripts to automate and maintain execution of test suits to support continuous integration (CI) and continuous development (CD) flow.
- Apply Agile development methodologies such as hosting code reviews, sprint planning, frequent deployment to cloud, and iterative development of features.
- Handle occasional on-call responsibilities for addressing hardware issues reported by our customers.