Senior Design Verification Engineer
Microsoft
Design
Mountain View, CA, USA
Responsibilities
- Develop complex verification environments and test suites, including pre-silicon functional verification at the block, chip, and system levels, reference modeling, and post-silicon validation.
- Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification.
- Create and drive comprehensive test plans and develop tests to ensure full feature coverage.
- Design and implement technical solutions to address complex design and quality challenges.
- Develop verification components such as scoreboards, sequences, constrained random tests, assertions, and functional coverage models.
- Triage and debug failures in testbenches, simulations, and emulation environments.
- Develop Makefiles and automation scripts to enable scalable and efficient verification flows.
- Apply Agile methodologies, including participation in code reviews, sprint planning, and continuous integration practices.
- Collaborate effectively with cross-functional teams across multiple sites and geographies.
Qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.
- This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
- 6+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
- 3+ years’ industry experience of chip and/or computer architecture.
- 3+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl
- CPU or Graphics core verification experience
- In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure.
- Experience with hardware design for embedded systems.
- Firmware development, with secure and non-secure boot flow.
- Experience with hardware emulation or FPGAs.
- Design experience or ability to write synthesizable code.
- Software development experience.
- Excellent communication skills.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.