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Physical Design Engineer, FullChip/ASIC Implementation

Location: Mountain View, CA, USA
Compensation:

USD 138k-197k / year + Equity

Posted:
15 days
Mid-Senior Level
Advertising
Advertising Platforms
Artificial Intelligence (AI)
Cloud Computing
Cloud Infrastructure
Consumer Applications
Cyber Security
Internet
Location Based Services
Productivity Tools
Search Engine
Software
Software Engineering

ASIC Physical Design Engineer (RDSS Intern)

Location: hsinchu, east district, hsinchu city, taiwan
Posted:
1 month
Internship
Cables
Communications Equipment
Connectivity
Connectivity Products
Electronic Equipment and Instruments
Ethernet
Hardware
Infrastructure
Low Latency
Networking
Routers & Switches
Science and Engineering
Semiconductors
Semiconductors & Related Devices
Software
Technology
Technology and Computing

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Location: Santa Clara, CA, USA; Hillsboro, OR, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
1 month
Senior
Cables
Communications Equipment
Connectivity
Connectivity Products
Electronic Equipment and Instruments
Ethernet
Hardware
Infrastructure
Low Latency
Networking
Routers & Switches
Science and Engineering
Semiconductors
Semiconductors & Related Devices
Software
Technology
Technology and Computing

Senior ASIC Physical Design Engineer, Netlisting

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 136k-264,500 / year + Equity

Posted:
2 months
Senior
Cables
Communications Equipment
Connectivity
Connectivity Products
Electronic Equipment and Instruments
Ethernet
Hardware
Infrastructure
Low Latency
Networking
Routers & Switches
Science and Engineering
Semiconductors
Semiconductors & Related Devices
Software
Technology
Technology and Computing

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

Location: Austin, TX, USA; Santa Clara, CA, USA
Compensation:

USD 116k-218,500 / year + Equity

Posted:
4 months
Internship
Cables
Communications Equipment
Connectivity
Connectivity Products
Electronic Equipment and Instruments
Ethernet
Hardware
Infrastructure
Low Latency
Networking
Routers & Switches
Science and Engineering
Semiconductors
Semiconductors & Related Devices
Software
Technology
Technology and Computing

ASIC Physical Design and Timing Engineer - New College Grad 2026

Location: Santa Clara, CA, USA
Compensation:

USD 116k-218,500 / year + Equity

Posted:
6+ months
Internship
Cables
Communications Equipment
Connectivity
Connectivity Products
Electronic Equipment and Instruments
Ethernet
Hardware
Infrastructure
Low Latency
Networking
Routers & Switches
Science and Engineering
Semiconductors
Semiconductors & Related Devices
Software
Technology
Technology and Computing

Sr. Physical Design Engineer, Annapurna Labs

Location: Austin, TX, USA
Posted:
2 months
IPO
Senior
Consumer Goods
E-Commerce
Retail
Shopping

SOC Top Level Physical Design Engineer, Annapurna Labs

Location: Cupertino, CA, USA
Posted:
4 months
IPO
Mid-Senior Level
Consumer Goods
E-Commerce
Retail
Shopping