Senior HSIO Validation Engineer
NVIDIA
NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of a team working on the design of state of the art memory sub-system components used in their industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.”
NVIDIA Silicon Solutions team is seeking world class Engineer to lead cross functional post-silicon development and validation of high speed SERDES our state-of-the-art GPUs. You will be part of a highly motivated, talented, global HW team and play a crucial role in delivering a high quality, state of the art GPU products to serve various markets. You will get to lead IO characterization efforts of various high speed IOs such as PCI-E,USB, Ethernet, NVLINK; Power characterization and Optimization of interfaces, System level functional testing for performance and system stability.
What you’ll be doing:
Develop and Own the planning and execution of functional and electrical bring up, system level feature validation, corner qualification, and resulting debug of SERDES interfaces on NVIDIA GPUs.
Manage schedule issues, programming guides, customer blocking issues, manufacturing yield improvements, and design feedback.
Coordinate with logic design, circuit design, board design, simulation, diagnostics, ATE, firmware, driver, and marketing teams to align product specifications.
Develop new methodologies to improve the quality and efficiency of the silicon validation process of analog/mixed-signal IPs.
What we need to see:
BTech/BE and a minimum of 5+ years of relevant experience.
Demonstrated track record of technical leadership in a post-silicon environment while delivering results on time.
Excellent knowledge of signal integrity concepts, jitter, silicon manufacturing characteristics, and high-speed electrical characterization interfaces (any of PCIe-gen5/Gen6, Infiniband, Thunderbolt, SAS, or similar protocols).
Detailed knowledge of lab/measurement equipment (DSOs, BERT, VNA, protocol analyzers) is required.
Excellent understanding of Datacenter architecture and IO usecases
Experience in Perl/Python is desired
Ways to stand out from the crowd:
Deep understanding of technology and a passion for what you do.
Familiarity with statistical methods and tools for data analysis.
Strong collaborative and communication skills, specifically a proven ability to effectively guide and influence within a dynamic environment.
Strive to be a standout colleague and be ready to work with global teams in a high-energy environment.
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